Wiring board and method for manufacturing the same, and semiconductor device

ABSTRACT

A wiring board includes an insulating base; an adhesive layer formed on the surface of the insulating base; a conductor wiring formed on the surface of the adhesive layer; and a bump formed crossing the longitudinal direction of the conductor wiring over regions on the adhesive layer on both sides of the conductor wiring, wherein the back face at a part of the conductor wiring where the bump is formed, and the back faces and parts of the side faces of the bump formed above the regions of the adhesive layer on both sides of the conductor wiring, are embedded in the surface of the adhesive layer so as to be adhered to the adhesive layer. Even when the wiring width of the conductor wiring is decreased, the conductor wiring can be adhered to the wiring board firmly.

BACKGROUND OF THE INVENTION

1. Field of the Invention

The present invention relates to a wiring board on which bumps areformed and a method for manufacturing the same, and also relates to asemiconductor device using the wiring board.

2. Description of Related Art

A conventionally known semiconductor device has a semiconductor elementthat is face-down mounted on a wiring board provided with bumps andelectrode pads on the semiconductor element are bonded to the bumps onthe wiring board using a TAB (Tape Automated Bonding) method commonlyused for the manufacture of semiconductor devices for liquid crystaldisplays etc. (see US 2004/0212969 A1, for example).

Hereinafter, a conventional wiring board provided with bumps, and asemiconductor device using such a wiring board will be described withreference to the drawings. FIG. 8 is a plan view showing a conventionalwiring board 21, and FIG. 9 is a sectional view taken along the lineB-B′ in FIG. 8.

In FIGS. 8 and 9, reference numeral 22 denotes an insulating base, andreference numeral 23 denotes conductor wirings formed on a surface ofthe insulating base 22. A bump 24 is formed on a leading end portion ofeach conductor wiring 23. Numeral 25 denotes first conductive layers forcoating the surfaces of the conductor wirings 23 and the bumps 24, whichare formed by electrolytic Au plating, electrolytic Ni/Au plating, orelectroless Sn plating or the like.

In the wiring board to be used for packaging according to the TABmethod, the insulating base etc. is formed of a flexible material orformed so as to have flexibility, and the steps of supplying the wiringboard, mounting the semiconductor element on the wiring board, carryingout inspection after the semiconductor element has been mounted, etc.are performed continuously by a reel-to-reel method. In order to impartflexibility to the wiring board, a flexible tape formed of polyimide orthe like and having a thickness of about 12 μm to about 40 μm is used asthe insulating base 22. The conductor wirings 23 on the insulating base22 are formed by patterning a Cu foil having a thickness of about 9 μmto about 18 μm by wet etching. In a case of forming the conductorwirings 23 through wet etching, since the etching proceeds from theupper faces of the conductor wirings downwards and in the transversedirection, the cross-section of each conductor wiring 23 is tapered asshown in FIG. 9. For example, in a case where the pitch of the conductorwirings is 40 μm, when a Cu foil of 9 μm in thickness is used andsubjected to wet etching so that the bottom width of the conductorwiring 23 becomes 15 μm, the width of the upper face part of theconductor wiring 23 will be about 8 μm. Each bump 24 is formed byelectrolytic copper plating so as to have a thickness of about 8 μm anda width of about 20 μm, crossing the longitudinal direction of eachconductor wiring 23 over both side regions of the conductor wiring 23.

FIG. 10 is a sectional view showing a semiconductor device obtained byface-down mounting a semiconductor element 26 on the conventional wiringboard 21, with application of heat and pressure. Electrode pads 27 areformed on the semiconductor element 26, and second conductive layers 28are formed to coat the surfaces of the electrode pads 27. The secondconductive layers 28 are bonded to the bumps 24 on the wiring board 21via the first conductive layers 25. The second conductive layers 28 areformed by electrolytic Au plating, electroless Ni/Au plating or thelike.

Recently, due to the tendency for larger and higher resolution liquidcrystal display panels, the number of pins has increased in asemiconductor device used for a liquid crystal display assembled usingthe TAB method. In some usages, a semiconductor chip of about 20 mm×1 mmhaving more than 1000 electrode pads has appeared. As a result, thepitch for the electrode pads has been decreased, and a pitch of not morethan 40 μm is required.

However, in a semiconductor device using the conventional wiring board21 as shown in FIG. 10, only the bottom faces of the conductor wirings23 adhere to the surface of the insulating base 22. The bottom faces ofthe bumps 25 grow in contact with the surface of the insulating base 22due to the electroplating, but it does not adhere. Therefore, when thewiring width of the conductor wirings 23 is decreased corresponding tothe narrowing pitch of the electrode pads 27, the adhesion strengthbetween the conductor wirings 23 and the insulating base 22 will bedecreased. This will cause a problem that the conductor wirings 23 arepeeled from the insulating base 22 due to a thermal stress after theface-down mounting of the semiconductor element 26 or a mechanicalstress caused by bending or the like of the wiring board 21 during areel-to-reel conveyance that is characteristic to the TAB method.

SUMMARY OF THE INVENTION

The present invention has been made in order to solve theabove-described problems in the prior art, and it is an object of thepresent invention to provide a wiring board in which conductor wiringsare adhered firmly to the wiring board even when the conductor wiringhas a reduced width.

For achieving the above object, a wiring board having a firstconfiguration according to the present invention includes: an insulatingbase; an adhesive layer formed on the surface of the insulating base; aconductor wiring formed on the surface of the adhesive layer; and a bumpformed crossing the longitudinal direction of the conductor wiring overregions on the adhesive layer on both sides of the conductor wiring,wherein the back face at a part of the conductor wiring where the bumpis formed, and the back faces and parts of the side faces of the bumpformed above the adhesive layer on both sides of the conductor wiring,are embedded in the surface of the adhesive layer so as to be adhered tothe adhesive layer.

A wiring board having a second configuration according to the presentinvention includes: an insulating base having at least an adhesivesurface; a conductor wiring formed on the surface of the insulatingbase; and a bump formed crossing the longitudinal direction of theconductor wiring over regions on the insulating base on both sides ofthe conductor wiring, wherein the back face at a part of the conductorwiring where the bump is formed, and the back faces and parts of theside faces of the bump formed above the insulating base on both sides ofthe conductor wiring, are embedded in the surface of the insulating baseso as to be adhered to the insulating base.

A method for manufacturing a wiring board according to the presentinvention includes the steps of: preparing a lamination base comprisingan insulating base, an adhesive layer formed on the insulation base, anda conductor layer laminated on the adhesive layer; patterning theconductor layer on the surface of the lamination base so as to form aconductor wiring; forming a bump by electroplating using the conductorwiring as a cathode, where the bump crosses the longitudinal directionof the conductor wiring over regions on the adhesive layer on both sidesof the conductor wiring; and subjecting the bump to heat and pressurefrom above so that the back face at a part of the conductor wiring underthe bump, and the back faces and parts of the side faces of the bump inthe regions formed above the adhesive layer on both sides of theconductive wiring, are buried inwards from the surface of the adhesivelayer so as to be adhered to the adhesive layer.

A method for manufacturing a semiconductor device according to thepresent invention includes the steps of: preparing a lamination basecomprising an insulating base, an adhesive layer formed on theinsulation base, and a conductor layer laminated on the adhesive layer;patterning the conductor layer on the surface of the lamination base soas to form a conductor wiring; forming a bump by electroplating usingthe conductor wiring as a cathode, where the bump crosses thelongitudinal direction of the conductor wiring over regions on theadhesive layer on both sides of the conductor wiring; coating thesurface of the bump and parts of side faces of the bump formed above theadhesive layer on both sides of the conductor wiring, with a conductivelayer formed of a material different from the material of the bump;preparing a semiconductor chip having an electrode pad at a positioncorresponding to the bump, and placing the electrode pad on thesemiconductor chip and the bump to correspond to each other, applyingheat and pressure through the back face of the semiconductor chip so asto press and bond the electrode pad to the conductive layer on thesurface of the bump with heat, and at the same time causing the backfaces and parts of the side faces of the bump formed above the regionsof the adhesive layer on both sides of the conductor wiring to be buriedinwards from the surface of the adhesive layer so as to be adhered tothe adhesive layer via the conductive layer.

BRIEF DESCRIPTION OF THE DRAWINGS

FIG. 1 is a plan view showing a wiring board according to first andsecond embodiments of the present invention.

FIG. 2A is a sectional view showing the cross section of the wiringboard taken along the line A-A′ in FIG. 1.

FIG. 2B is a sectional view showing the cross section of anotherembodiment of the wiring board.

FIG. 3 is a sectional view showing a wiring board according to a thirdembodiment of the present invention.

FIG. 4 is a sectional view showing a semiconductor device according to afourth embodiment of the present invention.

FIG. 5A to 5G are sectional views illustrating a method of manufacturinga wiring board according to a fifth embodiment of the present invention.

FIG. 6 is a plan view illustrating the manufacturing method shown inFIGS. 5A to 5G.

FIG. 7A and 7B are sectional views illustrating a method ofmanufacturing a semiconductor device according to a sixth embodiment ofthe present invention.

FIG. 8 is a plan view showing an example of a conventional wiring board.

FIG. 9 is a sectional view showing the cross section of the wiring boardtaken along the line B-B′ in FIG. 8.

FIG. 10 is a sectional view showing a semiconductor device using anexample of a conventional wiring board.

DETAILED DESCRIPTION OF THE INVENTION

In a wiring board according to the present invention, a bump formedcrossing the longitudinal direction of a conductor wiring over regionson an adhesive layer on both sides of the conductor wiring or over aregion of an adhesive insulating base is embedded in the surface ofeither the adhesive layer or the insulating base, and not only the backface of the conductor wiring but the back faces and parts of the sidefaces of the bump are adhered to either the adhesive layer or theinsulating base. Thereby, even when the wiring width of the conductorwiring is decreased, the bump is adhered to the wiring board firmly.

According to a method for manufacturing a wiring board or a method formanufacturing the semiconductor device according to the presentinvention, since a bump is formed by electroplating using a conductorwiring as a cathode, the bump is made wider than the back face of theconductor wiring, and the side faces of the bump are connected to theback face of the conductor wiring via the back faces of the bump so asto have a smooth convex shape. Thereby, the adhesion area between thebump and the adhesive layer can be increased to adhere to the wiringboard firmly.

In the wiring board having the first configuration according to thepresent invention, it is preferable that the bump formed crossing thelongitudinal direction of the conductor wiring over the regions on theadhesive layer on both sides of the conductor wiring is wider than theback face of the conductor wiring, and a surface of an area ranging fromthe back face of the conductor wiring to the side faces of the bump viathe back faces of the bump has a smooth convex shape.

Further, it is preferable that the adhesive layer formed on the surfaceof the insulating base has a thickness greater than the distance thatthe back face at a part of the conductor wiring where the bump is formedand the back faces and parts of the side faces of the bump formed abovethe adhesive layer on both sides of the conductor wiring are embedded inthe surface of the adhesive layer.

Further, it is preferable that the surface of the bump and the regionsof the bump formed on the adhesive layer on both sides of the conductorwiring are coated with a first conductive layer formed of at least onematerial different from the material of the bump.

Further, it is preferable that the side faces of the bump on the regionsembedded in the surface of the adhesive layer are adhered to theadhesive layer via the first conductive layer.

In the wiring board having the second configuration according to thepresent invention, it is preferable that the bump formed crossing thelongitudinal direction of the conductor wiring over the regions of theinsulating base on both sides of the conductor wiring is wider than theback face of the conductor wiring, and a surface of an area ranging fromthe back face of the conductor wiring to the side faces of the bump viathe back faces of the bump has a smooth convex shape.

Further, it is preferable that the surface of the bump and the regionsof the bump on the insulating base on both sides of the conductor wiringare coated with a first conductive layer formed of at least one materialdifferent from the material of the bump.

Further, it is preferable that the side faces of the bump on the regionsembedded in the surface of the insulating base are adhered to theinsulating base via the first conductive layer.

A semiconductor device according to the present invention includes awiring board having any of the above-mentioned configurations and asemiconductor chip mounted on the wiring board, where an electrode padon the semiconductor chip and the bump formed on the wiring board areconnected electrically to each other.

In this configuration, it is preferable that a second conductive layermade of at least one material different from the material of theelectrode pad is formed on the surface of the electrode pad.

In the method for manufacturing a wiring board having a configuration ofthe present invention, it is preferable that the method furtherincludes, subsequent to the step of forming the bump by electroplatingusing the conductor wiring as a cathode, where the bump crosses thelongitudinal direction of the conductor wiring over regions on theadhesive layer on both sides of the conductor wiring, a step of coatingthe surface of the bump and the parts of the side faces of the bumpformed above the adhesive layer on both sides of the conductor wiring,with a conductive layer formed of at least one material different fromthe material of the bump, wherein the bump coated with the conductivelayer is subjected to heat and pressure from above so that the backfaces and the parts of the side faces of the bump formed above theadhesive layer on both sides of the conductor wiring are buried inwardsfrom the surface of the adhesive layer so as to be adhered to theadhesive layer via the conductive layer.

In the method for manufacturing the semiconductor device according tothe present invention, it is preferable that an ultrasonic vibration isapplied at the same time as the step of applying heat and pressurethrough the back face of the semiconductor chip.

Embodiments of the present invention will be described below withreference to the attached drawings.

First Embodiment

FIG. 1 is a plan view showing a wiring board 1 according to first andsecond embodiments of the present invention, and FIG. 2A is a sectionalview showing the cross section taken along the line A-A′ in FIG. 1.

In FIGS. 1 and 2A, numeral 2 denotes an insulating base, 3 denotes anadhesive layer formed on the surface of the insulating base 2, and 4denotes conductor wirings formed on the adhesive layer 3. A bump 5 isformed crossing the leading tip portion of each conductor wiring 4 overregions on the adhesive layer 3 on both sides of the conductor wiring 4.As shown in FIG. 2A, the back face at a part of the conductor wiring 4where the bump 5 is formed, and the back faces and parts of the sidefaces of the bump 5 formed above the adhesive layer 3 on both sides ofthe conductor wiring 4, are embedded in the surface of the adhesivelayer 3 so as to be adhered to the adhesive layer 3.

Here, a flexible tape made of polyimide or the like having a thicknessof about 12 μm to about 40 μm may be used for the insulating base 2. Theadhesive layer 3 on the insulating base 2 may be made of epoxy or thelike, and the thickness is about 3 μm to about 10 μm. The conductorwirings 4 may be formed by patterning a Cu foil having a thickness ofabout 9 μm to about 18 μm through wet etching. When the conductorwirings 4 are formed by the wet etching, since the etching proceeds fromthe upper part of each conductor wiring 4 downwards and in thetransverse direction, the cross section of the conductor wiring 4 willbe tapered as shown in FIG. 2A. The bumps 5 may be formed byelectrolytic Cu plating. The widths and heights of the conductor wiring4 and each bump 5 are determined in view of the insulation, themachining accuracy, and the mechanical strength. For example, when thepitch of the conductive wiring 4 is 40 μm, a Cu foil 9 having athickness of 9 μm is subjected to wet etching so that the width of thelower part of the conductor wiring 4 will be 15 μm. In this case, thewidth of the upper part of the conductor wiring 4 will be about 8 μm.The bump 5 having a thickness of about 8 μm and a width of about 20 μmis formed on the conductor wiring 4 by electroplating.

It is preferable that the thickness of the adhesive layer 3 is greaterthan the depth by which the back face at a part of the conductor wiring4 where the bump 5 is formed and the back faces and parts of the sidefaces of the bump 5 formed above the adhesive layer 3 on both sides ofthe conductor wiring 4 are embedded in the surface of the adhesive layer3.

The Cu used as the material for the bump 5 can be replaced with anotherconductive material such as Au, Ni and In.

Instead of the configuration that the adhesive layer 3 is formed on thesurface of the insulating base 2, a configuration that at least thesurface of the insulating base 2 shows adhesiveness can be used as shownin FIG. 2B. The same can be applied to any of the following embodiments.

As mentioned above, according to the first embodiment of the presentinvention, the back face at a part of the conductor wiring 4 where thebump 5 is formed, and the back faces and parts of the side faces of thebump 5 formed above the adhesive layer 3 on both sides of the conductorwiring 4, are embedded in the surface of the adhesive layer 3 so as tobe adhered to the adhesive layer 3. Therefore, the adhesion strengthbetween the conductor wiring 4 and the adhesive layer 3 can be improvedin comparison with a case where only the back face of the conductorwiring 4 adheres to the adhesive layer 3.

Second Embodiment

The wiring board according to a second embodiment of the presentinvention has the configuration as shown in the above-mentionedsectional view of FIG. 2A.

In the cross section of FIG. 2A, the bump 5 formed crossing thelongitudinal direction of the conductor wiring 4 over regions on theadhesive layer 3 on both sides of the conductor wiring 4 is wider thanthe back face of the conductor wiring 4. And a surface of an arearanging from the back face of the conductor wiring 4 to the side facesof the bump 5 via the back faces of the bump 5 has a smooth convexshape. The back faces and parts of the side faces of the bump 5 areembedded in the surface of the adhesive layer 3 to be adhered to theadhesive layer 3.

According to the second embodiment, since the back faces and the sidefaces of the bump 5 can be adhered tightly to the adhesive layer 3continuously without any substantial gap being formed between the sidefaces of the bump 5 and the adhesive layer 3, the adhesion strengthbetween the bump 5 and the adhesive layer 3 can be improved.

Third Embodiment

FIG. 3 is a sectional view showing a wiring board 1 according to a thirdembodiment of the present invention. In FIG. 3, the insulating base 2,the adhesive layer 3, the conductor wirings 4 and the bumps 5 aresimilar to those of the first embodiment. Furthermore, first conductivelayers 6 for coating the bumps 5 are provided, through which the backfaces and the side faces of the bumps 5 are adhered to the adhesivelayer 3.

Here, for example, each first conductive layer 6 of Au having athickness of about 0.3 μm to about 2 μm may be formed by electroplating.In view of the barrier property and the material of the first conductivelayer 6, the thickness of the Au will be set to about 0.5 μm.Alternatively, the first conductive layer 6 can be made of pluralmaterials. For example, the ground layer can be made of Ni having athickness of about 1 μm and the surface layer can be made of Au having athickness of about 0.5 μm. Alternatively, the first conductive layer 6can be formed not by the electroplating but by electroless plating.

According to the third embodiment, the back faces and the side faces ofeach bump 5 adhere to the adhesive layer 3 via the first conductivelayer 6. As a result, the first conductive layer 6 serves as a barrierto prevent diffusion of the material of the bump 5 in the adhesive layer3, thereby improving the insulation reliability of the wiring board 1.

Fourth Embodiment

FIG. 4 is a sectional view showing a semiconductor device according to afourth embodiment of the present invention. The wiring board 1 in FIG. 4is similar to that of the third embodiment, and it is formed of theinsulating base 2, the adhesive layer 3, the conductor wirings 4, thebumps 5 and the first conductive layers 6. Numeral 7 denotes asemiconductor element face-down mounted on the wiring board 1. Electrodepads 8 are formed on the semiconductor element 7, and a secondconductive layer 9 is formed to coat the surface of each electrode pad8. The second conductive layers 9 are bonded to the bumps 5 via thefirst conductive layers 6.

The second conductive layers 9 may be formed by electrolytic Au plating,electroless Ni/Au plating or the like, for example. In one example, anelectroless Ni plating having a thickness of 4 μm is formed, on which anelectroless Au plating having a thickness of about 0.1 μm is formedfurther.

According to the fourth embodiment, the back face of each conductorwiring 4 in the region where the bump 5 is formed, and also the backfaces and parts of the side faces of the bump 5 formed above theadhesive layer 3 on both sides of the conductor wiring 4, are embeddedin the surface of the adhesive layer 3 so as to be adhered to theadhesive layer 3. Therefore, in comparison with a case where only theback face of the conductor wiring 4 adheres to the adhesive layer 3, theadhesion strength between the conductor wiring 4 and the adhesive layer3 is improved. Thereby, peeling of the conductor wirings 4 and the bumps5 from the wiring board 1, which is caused by a thermal stress due tothe face-down mounting of the semiconductor element 7 or a mechanicalstress due to bending or the like of the wiring board 1 during areel-to-reel conveyance being characteristic to the TAB method, can besuppressed.

Fifth Embodiment

A method for manufacturing a wiring board according to a fifthembodiment of the present invention will be described with reference tothe drawings. FIGS. 5A-5G illustrate the process of manufacturing thewiring board 1 as shown in FIGS. 1-3 in this order. FIG. 6 is a planview illustrating the process between FIGS. 5B and 5C. The componentscorresponding to those of the wiring board 1 as shown in FIGS. 1-3 areassigned with the same reference numbers and repeated explanation willbe omitted.

FIG. 5A is a sectional view taken along the line A-A′ in FIG. 1, duringthe process of manufacturing the wiring board 1, in which a Cu foil 10adhered to the adhesive layer 3 is shown. In the plan view of FIG. 6, 11denotes a resist formed on the entire surface of the wiring board 1, and12 denotes openings in the resist 11. Each opening 12 is formedextending over plural conductor wirings 4. FIGS. 5B-5F are sectionalviews showing the same position as in FIG. 5A. FIG. 5G also is asectional view showing the same position of the wiring board during themanufacturing process, and it shows also a heating tool 13 and a stage14.

First, as shown in FIG. 5A, a lamination base is prepared by adheringthe insulating base 2 and the Cu foil 10 via the adhesive layer 3. Next,as shown in FIG. 5B, the Cu foil 10 is subjected to wet etching to formconductor wirings 4. At this time, since the etching proceeds from theupper parts of the conductor wirings 4 downward and in the transversedirection, each of the conductor wirings 4 will have a tapered crosssection as shown in these drawings.

Next, as shown in FIG. 6, the resist 11 is formed on the entire surfaceof the wiring board 1 on which the conductor wirings 4 have been formed,and the resist 11 is patterned to form openings 12, each bridging overplural conductor wirings 4. By performing an electrolytic Cu platingusing the conductor wirings 4 as a cathode, the Cu plating is depositedon the conductor wirings 4 exposed through the openings 12, and therebythe bumps 5 as shown in FIG. 5E are formed.

FIG. 5C-5E show the process of electrolytic Cu plating using theconductor wirings 4 as the cathode, where deposition of the platingaround the conductor wirings 4 are shown in a chronological order, andthe shapes of the bumps in the respective drawings are denoted as 5 a, 5b and 5.

In the electrolytic Cu plating process, Cu ions in the plating solutionare coupled with electrons supplied from the conductor wirings 4 as thecathode, and thus the plating is deposited on the surfaces of theconductor wirings 4. Since the Cu ions are consumed at the upper partsof the conductor wirings 4 at this time, the Cu ion concentration in theplating solution is reduced at the lower parts of the conductor wirings4. As a result, the plating deposited on the upper parts of eachconductor wiring 4 is thick while the plating deposited on the lowerpart of the conductor wiring 4 is thin. Therefore, even when the crosssection of the conductor wiring 4 is tapered, as shown in FIGS. 5C-5E,the bump deposited around the conductor wiring 4 will have a shape suchthat a surface of an area ranging from the back face of the conductorwiring 4 to the side faces of the bump 5 via the back faces of the bump5 has a smooth convex shape.

Next, as shown in FIG. 5F, the surface of each bump 5 is coated with ametal different from the material of the bump 5, thereby forming thefirst conductive layer 6.

Next, as shown in FIG. 5G, the wiring board 1 is placed on the stage 14,and the surfaces of the bumps 5 are subjected to heat and pressure fromabove by the heating tool 13, so that the back face of each conductorwiring 4 and the back faces and parts of the side faces of each bump 5are buried inwards from the surface of the adhesive layer 3. Thereby,the adhesive layer 3 is melted and adhered to the bumps 5 via the firstconductive layer 6. When the adhesive layer 3 is based on epoxy, thetemperature of the heating tool 13 is set to 200° C. to 300° C. If thestage 14 also is heated at this time, the adhesive layer 3 can be meltedand adhered in a short time.

According to the fifth embodiment, since the bumps 5 are formed aroundthe conductor wirings 4 by electroplating using the conductor wirings 4as the cathode, even when the cross section of each conductor wiring 4is tapered, the bump 5 to be deposited around the conductor wiring 4will have a shape that a surface of an area ranging from the back faceof the conductor wiring 4 to the side faces of the bump 5 via the backfaces of the bump 5 has a smooth convex shape. Therefore, when the backfaces and parts of the side faces of the bump 5 are buried inwards fromthe surface of the adhesive layer 3 so as to be adhered to the adhesivelayer 3, the back faces and the side faces of the bump 5 will be adheredto the adhesive layer 3 continuously without having a gap between theside faces of the bump 5 and the adhesive layer 3, and thus the adhesionstrength between the bump 5 and the adhesive layer 3 can be improved.

Moreover, since after formation of the first conductive layers 6 on thesurfaces of the bumps 5, the surfaces of the bumps 5 are applied withheat and pressure from above so that the back faces and parts of theside faces of the bumps 5 are buried inwards from the surface of theadhesive layer 4 and adhered to the adhesive layer 3 via the firstconductive layers 6refore, the first conductive layers 6 serve as abarrier, so that diffusion of the material of the bumps 5 into theadhesive layer 3 is prevented, thereby improving the insulationreliability of the wiring board 1.

Sixth Embodiment

A method for manufacturing a semiconductor device according to a sixthembodiment of the present invention will be described with reference tothe drawings.

First, a wiring board 1 as shown in FIG. 7A is prepared. The wiringboard 1 as shown in FIG. 7A is similar to that shown in FIG. 5F, and itis manufactured by the method for manufacturing a wiring board accordingto the above-mentioned fifth embodiment, through the processes similarto those as illustrated in FIGS. 5A-5F.

Next, as shown in FIG. 7B, the wiring board 1 is placed on the stage 14.A semiconductor element 7 provided with electrode pads 8 and secondconductive layers 9 formed to coat the surfaces of the electrode pads 8is placed on the wiring board 1. Next, the back face of thesemiconductor element 7 is subjected to heat and pressure from above bythe heating tool 13 so as to bond the second conductive layers 9 on theelectrode pads 8 and the first conductive layers 6 on the bumps 5, andat the same time, causes the back faces of the conductor wirings 4 andthe back faces and parts of the side faces of the bumps 5 to be buriedinwards from the surface of the adhesive layer 3. Thereby, the adhesivelayer 3 is melted to adhere to the bumps 5 via the first conductivelayers 6.

If ultrasonic vibration is applied at the same time of application ofheat and pressure through the back face of the semiconductor chip, thefirst conductive layers 6 and the second conductive layers 9 can bebonded to each other in a short time.

According to the sixth embodiment, since the semiconductor element 7 isface-down mounted and at the same time, the back faces and parts of theside faces of the bumps 5 are caused to be buried inwards from thesurface of the adhesive layer so as to be adhered to the adhesive layer3, the time for manufacturing the semiconductor device can be shortened.

The invention may be embodied in other forms without departing from thespirit or essential characteristics thereof. The embodiments disclosedin this application are to be considered in all respects as illustrativeand not limiting. The scope of the invention is indicated by theappended claims rather than by the foregoing description, and allchanges which come within the meaning and range of equivalency of theclaims are intended to be embraced therein.

1. A wiring board comprising: an insulating base; an adhesive layerformed on the surface of the insulating base; a conductor wiring formedon an upper surface of the adhesive layer; and a bump formed crossingthe longitudinal direction of the conductor wiring over regions on theadhesive layer on both sides of the conductor wiring, wherein a backface of the conductor wiring at a region where the bump is formed, and aback face and a part of a side face of the bump formed on both sides ofthe conductor wiring, are embedded in the adhesive layer so as to beadhered to an inside surface of the adhesive layer, with an uppersurface of the conductor wiring on which the bump is formed being higherthan an outside surface of the adhesive layer which is exposed tooutside.
 2. The wiring board according to claim 1, wherein the bump iswider than the back face of the conductor wiring, and a surface of anarea ranging from the back face of the conductor wiring to the sidefaces of the bump via the back faces of the bump has a smooth convexshape.
 3. The wiring board according to claim 1, wherein the adhesivelayer formed on the surface of the insulating base has a thicknessgreater than the distance between the back face of the conductor wiringat a region where the bump is formed and the insulating base, the backface and the part of the side face of the bump formed on both sides ofthe conductor wiring are embedded in the adhesive layer.
 4. The wiringboard according to claim 1, wherein the surface of the bump and theregions of the bump formed on the adhesive layer on both sides of theconductor wiring are coated with a first conductive layer formed of atleast one material different from the material of the bump.
 5. Thewiring board according to claim 4, wherein the side faces of the bump onthe regions embedded in the surface of the adhesive layer are adhered tothe adhesive layer via the first conductive layer.
 6. A wiring boardcomprising: an insulating base having at least an adhesive surface; aconductor wiring formed on an upper surface of the insulating base; anda bump formed crossing the longitudinal direction of the conductorwiring over regions on the insulating base on both sides of theconductor wiring, wherein a back face of the conductor wiring at aregion where the bump is formed, and a back face and a part of a sideface of the bump formed on both sides of the conductor wiring, areembedded in the insulating base so as to be adhered to an inside surfaceof the insulating base, with an upper surface of the conductor wiring onwhich the bump is formed being higher than an outside surface of theinsulating base which is exposed to outside.
 7. The wiring boardaccording to claim 6, wherein the bump is wider than the back face ofthe conductor wiring, and a surface of an area ranging from the backface of the conductor wiring to the side faces of the bump via the backfaces of the bump has a smooth convex shape.
 8. The wiring boardaccording to claim 6, wherein the surface of the bump and the regions ofthe bump on the insulating base on both sides of the conductor wiringare coated with a first conductive layer formed of at least one materialdifferent from the material of the bump.
 9. The wiring board accordingto claim 8, wherein the side faces of the bump on the regions embeddedin the surface of the insulating base are adhered to the insulating basevia the first conductive layer.
 10. A semiconductor device comprisingthe wiring board according to claim 1 and a semiconductor chip mountedon the wiring board, wherein an electrode pad on the semiconductor chipand the bump formed on the wiring board are connected electrically toeach other.
 11. The semiconductor device according to claim 10, furthercomprising a second conductive layer formed on the surface of theelectrode pad, and the second conductive layer is formed of at least onematerial different from the material of the electrode pad.
 12. Asemiconductor device comprising the wiring board according to claim 6and a semiconductor chip mounted on the wiring board, wherein anelectrode pad on the semiconductor chip and the bump formed on thewiring board are connected electrically to each other.
 13. Thesemiconductor device according to claim 12, further comprising a secondconductive layer formed on the surface of the electrode pad, and thesecond conductive layer is formed of at least one material differentfrom the material of the electrode pad.